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switch to PotatoMania's cwu50-dtb and simple-ampli-switch

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This commit is contained in:
robert jakub 2024-10-24 10:09:25 +02:00
parent 7bf3c07190
commit 5e811d5b93
6 changed files with 1055 additions and 843 deletions
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22
uconsole/kernel/default.nix
View File

@ -28,18 +28,22 @@
});
patches = [
./patches/001-OCP8178-backlight-driver.patch
./patches/002-clockwork-cwu50.patch
./patches/002-drm-panel-add-clockwork-cwu50.patch
./patches/003-axp20x-power.patch
./patches/004-vc4_dsi-update.patch
./patches/005-bcm2835-audio-staging.patch
./patches/006-vc4_dsi-update-20241008.patch
./patches/007-drm-panel-cwu50-expose-dsi-error-status-to-userspace.patch
./patches/008-driver-staging-add-uconsole-simple-amplifier-switch.patch
];
in {
boot.kernelPackages = pkgs.callPackages kernelPackagesCfg {};
# boot.initrd.kernelModules = [
# "ocp8178_bl"
# "panel-cwu50"
# ];
boot.initrd.kernelModules = [
"ocp8178_bl"
"panel_clockwork_cwu50"
"vc4"
];
boot.kernelPatches =
(
@ -54,9 +58,9 @@ in {
name = "uconsole-config";
patch = null;
extraStructuredConfig = {
DRM_PANEL_CWU50 = pkgs.lib.kernel.module;
DRM_PANEL_CWD686 = pkgs.lib.kernel.module;
# SIMPLE_AMPLIFIER_SWITCH = pkgs.lib.kernel.module;
BACKLIGHT_CLASS_DEVICE = pkgs.lib.kernel.yes;
DRM_PANEL_CLOCKWORK_CWU50 = pkgs.lib.kernel.module;
SIMPLE_AMPLIFIER_SWITCH = pkgs.lib.kernel.module;
BACKLIGHT_OCP8178 = pkgs.lib.kernel.module;
REGMAP_I2C = pkgs.lib.kernel.yes;
@ -74,4 +78,6 @@ in {
};
}
];
systemd.services."serial-getty@ttyS0".enable = false;
}

835
uconsole/kernel/patches/002-clockwork-cwu50.patch
View File

@ -1,835 +0,0 @@
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -76,6 +76,32 @@ config DRM_PANEL_BOE_TV101WUM_NL6
Say Y here if you want to support for BOE TV101WUM and AUO KD101N80
45NA WUXGA PANEL DSI Video Mode panel
+
+config DRM_PANEL_CWD686
+ tristate "CWD686 panel"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y here if you want to enable support for CWD686 panel.
+ The panel has a 480x1280 resolution and uses 24 bit RGB per pixel.
+
+ To compile this driver as a module, choose M here: the module
+ will be called panel-cwd686.
+
+config DRM_PANEL_CWU50
+ tristate "CWU50 panel"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y here if you want to enable support for CWU50 panel.
+ The panel has a 720x1280 resolution and uses 24 bit RGB per pixel.
+
+ To compile this driver as a module, choose M here: the module
+ will be called panel-cwu50.
+
+
config DRM_PANEL_DSI_CM
tristate "Generic DSI command mode panels"
depends on OF
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -88,3 +88,5 @@ obj-$(CONFIG_DRM_PANEL_VISIONOX_R66451) += panel-visionox-r66451.o
obj-$(CONFIG_DRM_PANEL_WAVESHARE_TOUCHSCREEN) += panel-waveshare-dsi.o
obj-$(CONFIG_DRM_PANEL_WIDECHIPS_WS2401) += panel-widechips-ws2401.o
obj-$(CONFIG_DRM_PANEL_XINPENG_XPP055C272) += panel-xinpeng-xpp055c272.o
+obj-$(CONFIG_DRM_PANEL_CWD686) += panel-cwd686.o
+obj-$(CONFIG_DRM_PANEL_CWU50) += panel-cwu50.o
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-cwd686.c
@@ -0,0 +1,300 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <drm/drm_modes.h>
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_panel.h>
+#include <linux/backlight.h>
+#include <linux/gpio/consumer.h>
+#include <linux/regulator/consumer.h>
+#include <linux/delay.h>
+#include <linux/of_device.h>
+#include <linux/module.h>
+
+struct cwd686 {
+ struct device *dev;
+ struct drm_panel panel;
+ struct regulator *supply;
+ struct gpio_desc *reset_gpio;
+ struct backlight_device *backlight;
+ bool prepared;
+ bool enabled;
+ enum drm_panel_orientation orientation;
+};
+
+static const struct drm_display_mode default_mode = {
+ .clock = 54465,
+ .hdisplay = 480,
+ .hsync_start = 480 + 150,
+ .hsync_end = 480 + 150 + 24,
+ .htotal = 480 + 150 + 24 + 40,
+ .vdisplay = 1280,
+ .vsync_start = 1280 + 12,
+ .vsync_end = 1280 + 12+ 6,
+ .vtotal = 1280 + 12 + 6 + 10,
+};
+
+static inline struct cwd686 *panel_to_cwd686(struct drm_panel *panel)
+{
+ return container_of(panel, struct cwd686, panel);
+}
+
+#define dcs_write_seq(seq...) \
+({ \
+ static const u8 d[] = { seq }; \
+ mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
+})
+
+static void cwd686_init_sequence(struct cwd686 *ctx)
+{
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+
+ dcs_write_seq(0xF0,0x5A,0x59);
+ dcs_write_seq(0xF1,0xA5,0xA6);
+ dcs_write_seq(0xB0,0x54,0x32,0x23,0x45,0x44,0x44,0x44,0x44,0x9F,0x00,0x01,0x9F,0x00,0x01);
+ dcs_write_seq(0xB1,0x32,0x84,0x02,0x83,0x29,0x06,0x06,0x72,0x06,0x06);
+ dcs_write_seq(0xB2,0x73);
+ dcs_write_seq(0xB3,0x0B,0x09,0x13,0x11,0x0F,0x0D,0x00,0x00,0x00,0x03,0x00,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x05,0x07);
+ dcs_write_seq(0xB4,0x0A,0x08,0x12,0x10,0x0E,0x0C,0x00,0x00,0x00,0x03,0x00,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x04,0x06);
+ dcs_write_seq(0xB6,0x13,0x13);
+ dcs_write_seq(0xB8,0xB4,0x43,0x02,0xCC);
+ dcs_write_seq(0xB9,0xA5,0x20,0xFF,0xC8);
+ dcs_write_seq(0xBA,0x88,0x23);
+ dcs_write_seq(0xBD,0x43,0x0E,0x0E,0x50,0x50,0x29,0x10,0x03,0x44,0x03);
+ dcs_write_seq(0xC1,0x00,0x0C,0x16,0x04,0x00,0x30,0x10,0x04);
+ dcs_write_seq(0xC2,0x21,0x81);
+ dcs_write_seq(0xC3,0x02,0x30);
+ dcs_write_seq(0xC7,0x25,0x6A);
+ dcs_write_seq(0xC8,0x7C,0x68,0x59,0x4E,0x4B,0x3C,0x41,0x2B,0x44,0x43,0x43,0x60,0x4E,0x55,0x47,0x44,0x38,0x27,0x06,0x7C,0x68,0x59,0x4E,0x4B,0x3C,0x41,0x2B,0x44,0x43,0x43,0x60,0x4E,0x55,0x47,0x44,0x38,0x27,0x06);//GAMMA2.2
+ //dcs_write_seq(0xC8,0x7C,0x66,0x56,0x4A,0x46,0x37,0x3B,0x24,0x3D,0x3C,0x3A,0x56,0x42,0x48,0x39,0x38,0x2C,0x17,0x06,0x7C,0x66,0x56,0x4A,0x46,0x37,0x3B,0x24,0x3D,0x3C,0x3A,0x56,0x42,0x48,0x39,0x38,0x2C,0x17,0x06);//GAMMA2.5
+ //dcs_write_seq(0xC8,0x7C,0x69,0x5B,0x50,0x4E,0x40,0x46,0x31,0x4A,0x49,0x49,0x67,0x56,0x5E,0x51,0x4E,0x41,0x2F,0x06,0x7C,0x69,0x5B,0x50,0x4E,0x40,0x46,0x31,0x4A,0x49,0x49,0x67,0x56,0x5E,0x51,0x4E,0x41,0x2F,0x06);//GAMMA2.0
+ //dcs_write_seq(0xC8,0x7C,0x6D,0x60,0x56,0x54,0x47,0x4c,0x37,0x50,0x4e,0x4e,0x6d,0x5c,0x66,0x59,0x56,0x4A,0x36,0x06,0x7C,0x6D,0x60,0x56,0x54,0x47,0x4c,0x37,0x50,0x4e,0x4e,0x6d,0x5c,0x66,0x59,0x56,0x4A,0x36,0x06);//GAMMA1.8
+ //dcs_write_seq(0xC8,0x7C,0x6e,0x62,0x59,0x58,0x4b,0x52,0x3d,0x57,0x56,0x56,0x75,0x66,0x71,0x66,0x64,0x55,0x44,0x06,0x7C,0x6e,0x62,0x59,0x58,0x4b,0x52,0x3d,0x57,0x56,0x56,0x75,0x66,0x71,0x66,0x64,0x55,0x44,0x06);//GAMMA1.6
+ dcs_write_seq(0xD4,0x00,0x00,0x00,0x32,0x04,0x51);
+ dcs_write_seq(0xF1,0x5A,0x59);
+ dcs_write_seq(0xF0,0xA5,0xA6);
+ dcs_write_seq(0x36,0x14);
+ dcs_write_seq(0x35,0x00);
+ dcs_write_seq(0x11);
+ msleep(120);
+ dcs_write_seq(0x29);
+ msleep(20);
+}
+
+static int cwd686_disable(struct drm_panel *panel)
+{
+ struct cwd686 *ctx = panel_to_cwd686(panel);
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ int ret;
+
+ if (!ctx->enabled)
+ return 0;
+
+ backlight_disable(ctx->backlight);
+
+ ctx->enabled = false;
+
+ return 0;
+}
+
+static int cwd686_unprepare(struct drm_panel *panel)
+{
+ struct cwd686 *ctx = panel_to_cwd686(panel);
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ int ret;
+
+#if 0
+ if (!ctx->prepared)
+ return 0;
+
+ ret = mipi_dsi_dcs_set_display_off(dsi);
+ if (ret) {
+ dev_err(ctx->dev, "failed to turn display off (%d)\n", ret);
+ return ret;
+ }
+
+ ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
+ if (ret) {
+ dev_err(ctx->dev, "failed to enter sleep mode (%d)\n", ret);
+ return ret;
+ }
+ msleep(120);
+
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ msleep(5);
+
+ ctx->prepared = false;
+#endif
+
+ return 0;
+}
+
+static int cwd686_prepare(struct drm_panel *panel)
+{
+ struct cwd686 *ctx = panel_to_cwd686(panel);
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ int ret;
+
+ if (ctx->prepared)
+ return 0;
+
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ msleep(10);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ msleep(120);
+
+ /* Enabe tearing mode: send TE (tearing effect) at VBLANK */
+ ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+ if (ret) {
+ dev_err(ctx->dev, "failed to enable vblank TE (%d)\n", ret);
+ return ret;
+ }
+ /* Exit sleep mode and power on */
+
+ cwd686_init_sequence(ctx);
+
+ ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
+ if (ret) {
+ dev_err(ctx->dev, "failed to exit sleep mode (%d)\n", ret);
+ return ret;
+ }
+ msleep(120);
+
+ ret = mipi_dsi_dcs_set_display_on(dsi);
+ if (ret) {
+ dev_err(ctx->dev, "failed to turn display on (%d)\n", ret);
+ return ret;
+ }
+ msleep(20);
+
+ ctx->prepared = true;
+
+ return 0;
+}
+
+static int cwd686_enable(struct drm_panel *panel)
+{
+ struct cwd686 *ctx = panel_to_cwd686(panel);
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ int ret;
+
+ if (ctx->enabled)
+ return 0;
+
+ backlight_enable(ctx->backlight);
+
+ ctx->enabled = true;
+
+ return 0;
+}
+
+static int cwd686_get_modes(struct drm_panel *panel, struct drm_connector *connector)
+{
+ struct cwd686 *ctx = panel_to_cwd686(panel);
+ struct drm_display_mode *mode;
+
+ mode = drm_mode_duplicate(connector->dev, &default_mode);
+ if (!mode) {
+ dev_err(panel->dev, "bad mode or failed to add mode\n");
+ return -EINVAL;
+ }
+ drm_mode_set_name(mode);
+ mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
+
+ connector->display_info.width_mm = mode->width_mm;
+ connector->display_info.height_mm = mode->height_mm;
+
+ /* set up connector's "panel orientation" property */
+ drm_connector_set_panel_orientation(connector, ctx->orientation);
+
+ drm_mode_probed_add(connector, mode);
+
+ return 1; /* Number of modes */
+}
+
+static const struct drm_panel_funcs cwd686_drm_funcs = {
+ .disable = cwd686_disable,
+ .unprepare = cwd686_unprepare,
+ .prepare = cwd686_prepare,
+ .enable = cwd686_enable,
+ .get_modes = cwd686_get_modes,
+};
+
+static int cwd686_probe(struct mipi_dsi_device *dsi)
+{
+ struct device *dev = &dsi->dev;
+ struct cwd686 *ctx;
+ int ret;
+
+ ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
+ if (!ctx)
+ return -ENOMEM;
+
+ mipi_dsi_set_drvdata(dsi, ctx);
+ ctx->dev = dev;
+
+ dsi->lanes = 4;
+ dsi->format = MIPI_DSI_FMT_RGB888;
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | MIPI_DSI_MODE_LPM;
+
+ ctx->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
+ if (IS_ERR(ctx->reset_gpio)) {
+ ret = PTR_ERR(ctx->reset_gpio);
+ if (ret != -EPROBE_DEFER)
+ dev_err(dev, "failed to request GPIO (%d)\n", ret);
+ return ret;
+ }
+
+ ctx->backlight = devm_of_find_backlight(dev);
+ if (IS_ERR(ctx->backlight)) {
+ dev_err(ctx->dev, "devm_of_find_backlight");
+ return PTR_ERR(ctx->backlight);
+ }
+
+ ret = of_drm_get_panel_orientation(dev->of_node, &ctx->orientation);
+ if (ret) {
+ dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, ret);
+ return ret;
+ }
+
+ ctx->panel.prepare_prev_first = true;
+
+ drm_panel_init(&ctx->panel, dev, &cwd686_drm_funcs, DRM_MODE_CONNECTOR_DSI);
+
+ drm_panel_add(&ctx->panel);
+
+ ret = mipi_dsi_attach(dsi);
+ if (ret < 0) {
+ dev_err(dev, "mipi_dsi_attach() failed: %d\n", ret);
+ drm_panel_remove(&ctx->panel);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void cwd686_remove(struct mipi_dsi_device *dsi)
+{
+ struct cwd686 *ctx = mipi_dsi_get_drvdata(dsi);
+
+ mipi_dsi_detach(dsi);
+ drm_panel_remove(&ctx->panel);
+}
+
+static const struct of_device_id cwd686_of_match[] = {
+ { .compatible = "cw,cwd686" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, cwd686_of_match);
+
+static struct mipi_dsi_driver cwd686_driver = {
+ .probe = cwd686_probe,
+ .remove = cwd686_remove,
+ .driver = {
+ .name = "panel-cwd686",
+ .of_match_table = cwd686_of_match,
+ },
+};
+module_mipi_dsi_driver(cwd686_driver);
+
+MODULE_DESCRIPTION("DRM Driver for cwd686 MIPI DSI panel");
+MODULE_LICENSE("GPL v2");
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-cwu50.c
@@ -0,0 +1,486 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <drm/drm_modes.h>
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_panel.h>
+#include <linux/backlight.h>
+#include <linux/gpio/consumer.h>
+#include <linux/regulator/consumer.h>
+#include <linux/delay.h>
+#include <linux/of_device.h>
+#include <linux/module.h>
+
+struct cwu50 {
+ struct device *dev;
+ struct drm_panel panel;
+ struct regulator *supply;
+ struct gpio_desc *reset_gpio;
+ struct backlight_device *backlight;
+ bool prepared;
+ bool enabled;
+ enum drm_panel_orientation orientation;
+};
+
+static const struct drm_display_mode default_mode = {
+ .clock = 62500,
+ .hdisplay = 720,
+ .hsync_start = 720 + 43,
+ .hsync_end = 720+ 43 + 20,
+ .htotal = 720 + 43 + 20 + 20,
+ .vdisplay = 1280,
+ .vsync_start = 1280 + 8,
+ .vsync_end = 1280 + 8+ 2,
+ .vtotal = 1280 + 8 + 2 + 16,
+};
+
+static inline struct cwu50 *panel_to_cwu50(struct drm_panel *panel)
+{
+ return container_of(panel, struct cwu50, panel);
+}
+
+#define dcs_write_seq(seq...) \
+({ \
+ static const u8 d[] = { seq }; \
+ mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
+})
+
+static void cwu50_init_sequence(struct cwu50 *ctx)
+{
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+
+ dcs_write_seq(0xE1,0x93);
+ dcs_write_seq(0xE2,0x65);
+ dcs_write_seq(0xE3,0xF8);
+ dcs_write_seq(0x70,0x20);
+ dcs_write_seq(0x71,0x13);
+ dcs_write_seq(0x72,0x06);
+ dcs_write_seq(0x75,0x03);
+ dcs_write_seq(0xE0,0x01);
+ dcs_write_seq(0x00,0x00);
+ dcs_write_seq(0x01,0x47);//VCOM0x47
+ dcs_write_seq(0x03,0x00);
+ dcs_write_seq(0x04,0x4D);
+ dcs_write_seq(0x0C,0x64);
+ dcs_write_seq(0x17,0x00);
+ dcs_write_seq(0x18,0xBF);
+ dcs_write_seq(0x19,0x00);
+ dcs_write_seq(0x1A,0x00);
+ dcs_write_seq(0x1B,0xBF);
+ dcs_write_seq(0x1C,0x00);
+ dcs_write_seq(0x1F,0x7E);
+ dcs_write_seq(0x20,0x24);
+ dcs_write_seq(0x21,0x24);
+ dcs_write_seq(0x22,0x4E);
+ dcs_write_seq(0x24,0xFE);
+ dcs_write_seq(0x37,0x09);
+ dcs_write_seq(0x38,0x04);
+ dcs_write_seq(0x3C,0x76);
+ dcs_write_seq(0x3D,0xFF);
+ dcs_write_seq(0x3E,0xFF);
+ dcs_write_seq(0x3F,0x7F);
+ dcs_write_seq(0x40,0x04);//Dot inversion type
+ dcs_write_seq(0x41,0xA0);
+ dcs_write_seq(0x44,0x11);
+ dcs_write_seq(0x55,0x02);
+ dcs_write_seq(0x56,0x01);
+ dcs_write_seq(0x57,0x49);
+ dcs_write_seq(0x58,0x09);
+ dcs_write_seq(0x59,0x2A);
+ dcs_write_seq(0x5A,0x1A);
+ dcs_write_seq(0x5B,0x1A);
+ dcs_write_seq(0x5D,0x78);
+ dcs_write_seq(0x5E,0x6E);
+ dcs_write_seq(0x5F,0x66);
+ dcs_write_seq(0x60,0x5E);
+ dcs_write_seq(0x61,0x60);
+ dcs_write_seq(0x62,0x54);
+ dcs_write_seq(0x63,0x5C);
+ dcs_write_seq(0x64,0x47);
+ dcs_write_seq(0x65,0x5F);
+ dcs_write_seq(0x66,0x5D);
+ dcs_write_seq(0x67,0x5B);
+ dcs_write_seq(0x68,0x76);
+ dcs_write_seq(0x69,0x61);
+ dcs_write_seq(0x6A,0x63);
+ dcs_write_seq(0x6B,0x50);
+ dcs_write_seq(0x6C,0x45);
+ dcs_write_seq(0x6D,0x34);
+ dcs_write_seq(0x6E,0x1C);
+ dcs_write_seq(0x6F,0x07);
+ dcs_write_seq(0x70,0x78);
+ dcs_write_seq(0x71,0x6E);
+ dcs_write_seq(0x72,0x66);
+ dcs_write_seq(0x73,0x5E);
+ dcs_write_seq(0x74,0x60);
+ dcs_write_seq(0x75,0x54);
+ dcs_write_seq(0x76,0x5C);
+ dcs_write_seq(0x77,0x47);
+ dcs_write_seq(0x78,0x5F);
+ dcs_write_seq(0x79,0x5D);
+ dcs_write_seq(0x7A,0x5B);
+ dcs_write_seq(0x7B,0x76);
+ dcs_write_seq(0x7C,0x61);
+ dcs_write_seq(0x7D,0x63);
+ dcs_write_seq(0x7E,0x50);
+ dcs_write_seq(0x7F,0x45);
+ dcs_write_seq(0x80,0x34);
+ dcs_write_seq(0x81,0x1C);
+ dcs_write_seq(0x82,0x07);
+ dcs_write_seq(0xE0,0x02);
+ dcs_write_seq(0x00,0x44);
+ dcs_write_seq(0x01,0x46);
+ dcs_write_seq(0x02,0x48);
+ dcs_write_seq(0x03,0x4A);
+ dcs_write_seq(0x04,0x40);
+ dcs_write_seq(0x05,0x42);
+ dcs_write_seq(0x06,0x1F);
+ dcs_write_seq(0x07,0x1F);
+ dcs_write_seq(0x08,0x1F);
+ dcs_write_seq(0x09,0x1F);
+ dcs_write_seq(0x0A,0x1F);
+ dcs_write_seq(0x0B,0x1F);
+ dcs_write_seq(0x0C,0x1F);
+ dcs_write_seq(0x0D,0x1F);
+ dcs_write_seq(0x0E,0x1F);
+ dcs_write_seq(0x0F,0x1F);
+ dcs_write_seq(0x10,0x1F);
+ dcs_write_seq(0x11,0x1F);
+ dcs_write_seq(0x12,0x1F);
+ dcs_write_seq(0x13,0x1F);
+ dcs_write_seq(0x14,0x1E);
+ dcs_write_seq(0x15,0x1F);
+ dcs_write_seq(0x16,0x45);
+ dcs_write_seq(0x17,0x47);
+ dcs_write_seq(0x18,0x49);
+ dcs_write_seq(0x19,0x4B);
+ dcs_write_seq(0x1A,0x41);
+ dcs_write_seq(0x1B,0x43);
+ dcs_write_seq(0x1C,0x1F);
+ dcs_write_seq(0x1D,0x1F);
+ dcs_write_seq(0x1E,0x1F);
+ dcs_write_seq(0x1F,0x1F);
+ dcs_write_seq(0x20,0x1F);
+ dcs_write_seq(0x21,0x1F);
+ dcs_write_seq(0x22,0x1F);
+ dcs_write_seq(0x23,0x1F);
+ dcs_write_seq(0x24,0x1F);
+ dcs_write_seq(0x25,0x1F);
+ dcs_write_seq(0x26,0x1F);
+ dcs_write_seq(0x27,0x1F);
+ dcs_write_seq(0x28,0x1F);
+ dcs_write_seq(0x29,0x1F);
+ dcs_write_seq(0x2A,0x1E);
+ dcs_write_seq(0x2B,0x1F);
+ dcs_write_seq(0x2C,0x0B);
+ dcs_write_seq(0x2D,0x09);
+ dcs_write_seq(0x2E,0x07);
+ dcs_write_seq(0x2F,0x05);
+ dcs_write_seq(0x30,0x03);
+ dcs_write_seq(0x31,0x01);
+ dcs_write_seq(0x32,0x1F);
+ dcs_write_seq(0x33,0x1F);
+ dcs_write_seq(0x34,0x1F);
+ dcs_write_seq(0x35,0x1F);
+ dcs_write_seq(0x36,0x1F);
+ dcs_write_seq(0x37,0x1F);
+ dcs_write_seq(0x38,0x1F);
+ dcs_write_seq(0x39,0x1F);
+ dcs_write_seq(0x3A,0x1F);
+ dcs_write_seq(0x3B,0x1F);
+ dcs_write_seq(0x3C,0x1F);
+ dcs_write_seq(0x3D,0x1F);
+ dcs_write_seq(0x3E,0x1F);
+ dcs_write_seq(0x3F,0x1F);
+ dcs_write_seq(0x40,0x1F);
+ dcs_write_seq(0x41,0x1E);
+ dcs_write_seq(0x42,0x0A);
+ dcs_write_seq(0x43,0x08);
+ dcs_write_seq(0x44,0x06);
+ dcs_write_seq(0x45,0x04);
+ dcs_write_seq(0x46,0x02);
+ dcs_write_seq(0x47,0x00);
+ dcs_write_seq(0x48,0x1F);
+ dcs_write_seq(0x49,0x1F);
+ dcs_write_seq(0x4A,0x1F);
+ dcs_write_seq(0x4B,0x1F);
+ dcs_write_seq(0x4C,0x1F);
+ dcs_write_seq(0x4D,0x1F);
+ dcs_write_seq(0x4E,0x1F);
+ dcs_write_seq(0x4F,0x1F);
+ dcs_write_seq(0x50,0x1F);
+ dcs_write_seq(0x51,0x1F);
+ dcs_write_seq(0x52,0x1F);
+ dcs_write_seq(0x53,0x1F);
+ dcs_write_seq(0x54,0x1F);
+ dcs_write_seq(0x55,0x1F);
+ dcs_write_seq(0x56,0x1F);
+ dcs_write_seq(0x57,0x1E);
+ dcs_write_seq(0x58,0x40);
+ dcs_write_seq(0x59,0x00);
+ dcs_write_seq(0x5A,0x00);
+ dcs_write_seq(0x5B,0x30);
+ dcs_write_seq(0x5C,0x02);
+ dcs_write_seq(0x5D,0x40);
+ dcs_write_seq(0x5E,0x01);
+ dcs_write_seq(0x5F,0x02);
+ dcs_write_seq(0x60,0x00);
+ dcs_write_seq(0x61,0x01);
+ dcs_write_seq(0x62,0x02);
+ dcs_write_seq(0x63,0x65);
+ dcs_write_seq(0x64,0x66);
+ dcs_write_seq(0x65,0x00);
+ dcs_write_seq(0x66,0x00);
+ dcs_write_seq(0x67,0x74);
+ dcs_write_seq(0x68,0x06);
+ dcs_write_seq(0x69,0x65);
+ dcs_write_seq(0x6A,0x66);
+ dcs_write_seq(0x6B,0x10);
+ dcs_write_seq(0x6C,0x00);
+ dcs_write_seq(0x6D,0x04);
+ dcs_write_seq(0x6E,0x04);
+ dcs_write_seq(0x6F,0x88);
+ dcs_write_seq(0x70,0x00);
+ dcs_write_seq(0x71,0x00);
+ dcs_write_seq(0x72,0x06);
+ dcs_write_seq(0x73,0x7B);
+ dcs_write_seq(0x74,0x00);
+ dcs_write_seq(0x75,0x87);
+ dcs_write_seq(0x76,0x00);
+ dcs_write_seq(0x77,0x5D);
+ dcs_write_seq(0x78,0x17);
+ dcs_write_seq(0x79,0x1F);
+ dcs_write_seq(0x7A,0x00);
+ dcs_write_seq(0x7B,0x00);
+ dcs_write_seq(0x7C,0x00);
+ dcs_write_seq(0x7D,0x03);
+ dcs_write_seq(0x7E,0x7B);
+ dcs_write_seq(0xE0,0x04);
+ dcs_write_seq(0x09,0x10);
+ dcs_write_seq(0xE0,0x00);
+ dcs_write_seq(0xE6,0x02);
+ dcs_write_seq(0xE7,0x02);
+ //dcs_write_seq(0x11);// SLPOUT
+ //msleep (120);
+ //dcs_write_seq(0x29);// DSPON
+ //msleep (20);
+ //dcs_write_seq(0x35,0x00);
+}
+
+static int cwu50_disable(struct drm_panel *panel)
+{
+ struct cwu50 *ctx = panel_to_cwu50(panel);
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ int ret;
+
+ if (!ctx->enabled)
+ return 0;
+
+ backlight_disable(ctx->backlight);
+
+ ctx->enabled = false;
+
+ return 0;
+}
+
+static int cwu50_unprepare(struct drm_panel *panel)
+{
+ struct cwu50 *ctx = panel_to_cwu50(panel);
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ int ret;
+
+#if 0
+ if (!ctx->prepared)
+ return 0;
+
+ ret = mipi_dsi_dcs_set_display_off(dsi);
+ if (ret) {
+ dev_err(ctx->dev, "failed to turn display off (%d)\n", ret);
+ return ret;
+ }
+
+ ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
+ if (ret) {
+ dev_err(ctx->dev, "failed to enter sleep mode (%d)\n", ret);
+ return ret;
+ }
+ msleep(120);
+
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ msleep(5);
+
+ ctx->prepared = false;
+#endif
+
+ return 0;
+}
+
+static int cwu50_prepare(struct drm_panel *panel)
+{
+ struct cwu50 *ctx = panel_to_cwu50(panel);
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ int ret;
+
+ if (ctx->prepared)
+ return 0;
+
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ msleep(10);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ msleep(120);
+
+ /* Enabe tearing mode: send TE (tearing effect) at VBLANK */
+ ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+ if (ret) {
+ dev_err(ctx->dev, "failed to enable vblank TE (%d)\n", ret);
+ return ret;
+ }
+ /* Exit sleep mode and power on */
+
+ cwu50_init_sequence(ctx);
+
+ ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
+ if (ret) {
+ dev_err(ctx->dev, "failed to exit sleep mode (%d)\n", ret);
+ return ret;
+ }
+ msleep(120);
+
+ ret = mipi_dsi_dcs_set_display_on(dsi);
+ if (ret) {
+ dev_err(ctx->dev, "failed to turn display on (%d)\n", ret);
+ return ret;
+ }
+ msleep(20);
+
+ ctx->prepared = true;
+
+ return 0;
+}
+
+static int cwu50_enable(struct drm_panel *panel)
+{
+ struct cwu50 *ctx = panel_to_cwu50(panel);
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ int ret;
+
+ if (ctx->enabled)
+ return 0;
+
+ backlight_enable(ctx->backlight);
+
+ ctx->enabled = true;
+
+ return 0;
+}
+
+static int cwu50_get_modes(struct drm_panel *panel, struct drm_connector *connector)
+{
+ struct cwu50 *ctx = panel_to_cwu50(panel);
+ struct drm_display_mode *mode;
+
+ mode = drm_mode_duplicate(connector->dev, &default_mode);
+ if (!mode) {
+ dev_err(panel->dev, "bad mode or failed to add mode\n");
+ return -EINVAL;
+ }
+ drm_mode_set_name(mode);
+ mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
+
+ connector->display_info.width_mm = mode->width_mm;
+ connector->display_info.height_mm = mode->height_mm;
+
+ /* set up connector's "panel orientation" property */
+ drm_connector_set_panel_orientation(connector, ctx->orientation);
+
+ drm_mode_probed_add(connector, mode);
+
+ return 1; /* Number of modes */
+}
+
+static const struct drm_panel_funcs cwu50_drm_funcs = {
+ .disable = cwu50_disable,
+ .unprepare = cwu50_unprepare,
+ .prepare = cwu50_prepare,
+ .enable = cwu50_enable,
+ .get_modes = cwu50_get_modes,
+};
+
+static int cwu50_probe(struct mipi_dsi_device *dsi)
+{
+ struct device *dev = &dsi->dev;
+ struct cwu50 *ctx;
+ int ret;
+
+ ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
+ if (!ctx)
+ return -ENOMEM;
+
+ mipi_dsi_set_drvdata(dsi, ctx);
+ ctx->dev = dev;
+
+ dsi->lanes = 4;
+ dsi->format = MIPI_DSI_FMT_RGB888;
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
+
+ ctx->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
+ if (IS_ERR(ctx->reset_gpio)) {
+ ret = PTR_ERR(ctx->reset_gpio);
+ if (ret != -EPROBE_DEFER)
+ dev_err(dev, "failed to request GPIO (%d)\n", ret);
+ return ret;
+ }
+
+ ctx->backlight = devm_of_find_backlight(dev);
+ if (IS_ERR(ctx->backlight)) {
+ dev_err(ctx->dev, "devm_of_find_backlight");
+ return PTR_ERR(ctx->backlight);
+ }
+
+ ret = of_drm_get_panel_orientation(dev->of_node, &ctx->orientation);
+ if (ret) {
+ dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, ret);
+ return ret;
+ }
+
+ ctx->panel.prepare_prev_first = true;
+
+ drm_panel_init(&ctx->panel, dev, &cwu50_drm_funcs, DRM_MODE_CONNECTOR_DSI);
+
+ drm_panel_add(&ctx->panel);
+
+ ret = mipi_dsi_attach(dsi);
+ if (ret < 0) {
+ dev_err(dev, "mipi_dsi_attach() failed: %d\n", ret);
+ drm_panel_remove(&ctx->panel);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void cwu50_remove(struct mipi_dsi_device *dsi)
+{
+ struct cwu50 *ctx = mipi_dsi_get_drvdata(dsi);
+
+ mipi_dsi_detach(dsi);
+ drm_panel_remove(&ctx->panel);
+}
+
+static const struct of_device_id cwu50_of_match[] = {
+ { .compatible = "cw,cwu50" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, cwu50_of_match);
+
+static struct mipi_dsi_driver cwu50_driver = {
+ .probe = cwu50_probe,
+ .remove = cwu50_remove,
+ .driver = {
+ .name = "panel-cwu50",
+ .of_match_table = cwu50_of_match,
+ },
+};
+module_mipi_dsi_driver(cwu50_driver);
+
+MODULE_DESCRIPTION("DRM Driver for cwu50 MIPI DSI panel");
+MODULE_LICENSE("GPL v2");

616
uconsole/kernel/patches/002-drm-panel-add-clockwork-cwu50.patch Normal file
View File

@ -0,0 +1,616 @@
From 1ec75b6cc01a82c250267efbc3bb7c4a2a220f87 Mon Sep 17 00:00:00 2001
From: Potato <nikko@faint.day>
Date: Fri, 20 Oct 2023 23:18:19 +0800
Subject: [PATCH 2/7] drm: panel: add clockwork cwu50
- set `power_off_case` to 2(other than 1) to enable power off by
DCS command
---
drivers/gpu/drm/panel/Kconfig | 12 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-clockwork-cwu50.c | 558 ++++++++++++++++++
3 files changed, 571 insertions(+)
create mode 100644 drivers/gpu/drm/panel/panel-clockwork-cwu50.c
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index d3109ea534fe..75c6b86581a1 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -76,6 +76,18 @@ config DRM_PANEL_BOE_TV101WUM_NL6
Say Y here if you want to support for BOE TV101WUM and AUO KD101N80
45NA WUXGA PANEL DSI Video Mode panel
+config DRM_PANEL_CLOCKWORK_CWU50
+ tristate "Clockwork CWU50 panel"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y here if you want to enable support for the Clockwork CWU50
+ JD9365D-based panel, e.g. as used within the Clockwork uConsole.
+ The panel has a 720x1280 resolution and uses 24 bit RGB per pixel.
+
+ To compile this driver as a module, choose M here.
+
config DRM_PANEL_DSI_CM
tristate "Generic DSI command mode panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 9dd9b3503802..549180da3e81 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_DRM_PANEL_AUO_A030JTN01) += panel-auo-a030jtn01.o
obj-$(CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0) += panel-boe-bf060y8m-aj0.o
obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) += panel-boe-himax8279d.o
obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o
+obj-$(CONFIG_DRM_PANEL_CLOCKWORK_CWU50) += panel-clockwork-cwu50.o
obj-$(CONFIG_DRM_PANEL_DSI_CM) += panel-dsi-cm.o
obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o
obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o
diff --git a/drivers/gpu/drm/panel/panel-clockwork-cwu50.c b/drivers/gpu/drm/panel/panel-clockwork-cwu50.c
new file mode 100644
index 000000000000..aef3f587a1f1
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-clockwork-cwu50.c
@@ -0,0 +1,558 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0+
+ * Copyright (c) 2021 Clockwork Tech LLC
+ * Copyright (c) 2021 Max Fierke <max@maxfierke.com>
+ *
+ */
+
+#include <drm/drm_modes.h>
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_panel.h>
+#include <linux/backlight.h>
+#include <linux/gpio/consumer.h>
+#include <linux/regulator/consumer.h>
+#include <linux/delay.h>
+#include <linux/of_device.h>
+#include <linux/module.h>
+#include <video/mipi_display.h>
+
+static int power_off_case = 1;
+module_param(power_off_case,int,0660);
+
+struct cwu50 {
+ struct device *dev;
+ struct drm_panel panel;
+ struct regulator *vci;
+ struct regulator *iovcc;
+ struct gpio_desc *reset_gpio;
+ enum drm_panel_orientation orientation;
+};
+
+static const struct drm_display_mode default_mode = {
+ .clock = 62500,
+
+ .hdisplay = 720,
+ .hsync_start = 720 + 43,
+ .hsync_end = 720 + 43 + 20,
+ .htotal = 720 + 43 + 20 + 20,
+
+ .vdisplay = 1280,
+ .vsync_start = 1280 + 8,
+ .vsync_end = 1280 + 8 + 2,
+ .vtotal = 1280 + 8 + 2 + 16,
+
+ .width_mm = 62,
+ .height_mm = 110,
+ .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static inline struct cwu50 *panel_to_cwu50(struct drm_panel *panel)
+{
+ return container_of(panel, struct cwu50, panel);
+}
+
+#define dcs_write_seq(seq...) \
+({ \
+ static const u8 d[] = { seq }; \
+ err = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
+ if (err < 0) \
+ return err; \
+})
+
+static int cwu50_init_sequence(struct cwu50 *ctx)
+{
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ int err;
+
+ dcs_write_seq(0xE1,0x93);
+ dcs_write_seq(0xE2,0x65);
+ dcs_write_seq(0xE3,0xF8);
+ dcs_write_seq(0x70,0x20);
+ dcs_write_seq(0x71,0x13);
+ dcs_write_seq(0x72,0x06);
+ dcs_write_seq(0x75,0x03);
+ dcs_write_seq(0xE0,0x01);
+ dcs_write_seq(0x00,0x00);
+ dcs_write_seq(0x01,0x47);//VCOM0x47
+ dcs_write_seq(0x03,0x00);
+ dcs_write_seq(0x04,0x4D);
+ dcs_write_seq(0x0C,0x64);
+ dcs_write_seq(0x17,0x00);
+ dcs_write_seq(0x18,0xBF);
+ dcs_write_seq(0x19,0x00);
+ dcs_write_seq(0x1A,0x00);
+ dcs_write_seq(0x1B,0xBF);
+ dcs_write_seq(0x1C,0x00);
+ dcs_write_seq(0x1F,0x7E);
+ dcs_write_seq(0x20,0x24);
+ dcs_write_seq(0x21,0x24);
+ dcs_write_seq(0x22,0x4E);
+ dcs_write_seq(0x24,0xFE);
+ dcs_write_seq(0x37,0x09);
+ dcs_write_seq(0x38,0x04);
+ dcs_write_seq(0x3C,0x76);
+ dcs_write_seq(0x3D,0xFF);
+ dcs_write_seq(0x3E,0xFF);
+ dcs_write_seq(0x3F,0x7F);
+ dcs_write_seq(0x40,0x04);//Dot inversion type
+ dcs_write_seq(0x41,0xA0);
+ dcs_write_seq(0x44,0x11);
+ dcs_write_seq(0x55,0x02);
+ dcs_write_seq(0x56,0x01);
+ dcs_write_seq(0x57,0x49);
+ dcs_write_seq(0x58,0x09);
+ dcs_write_seq(0x59,0x2A);
+ dcs_write_seq(0x5A,0x1A);
+ dcs_write_seq(0x5B,0x1A);
+ dcs_write_seq(0x5D,0x78);
+ dcs_write_seq(0x5E,0x6E);
+ dcs_write_seq(0x5F,0x66);
+ dcs_write_seq(0x60,0x5E);
+ dcs_write_seq(0x61,0x60);
+ dcs_write_seq(0x62,0x54);
+ dcs_write_seq(0x63,0x5C);
+ dcs_write_seq(0x64,0x47);
+ dcs_write_seq(0x65,0x5F);
+ dcs_write_seq(0x66,0x5D);
+ dcs_write_seq(0x67,0x5B);
+ dcs_write_seq(0x68,0x76);
+ dcs_write_seq(0x69,0x61);
+ dcs_write_seq(0x6A,0x63);
+ dcs_write_seq(0x6B,0x50);
+ dcs_write_seq(0x6C,0x45);
+ dcs_write_seq(0x6D,0x34);
+ dcs_write_seq(0x6E,0x1C);
+ dcs_write_seq(0x6F,0x07);
+ dcs_write_seq(0x70,0x78);
+ dcs_write_seq(0x71,0x6E);
+ dcs_write_seq(0x72,0x66);
+ dcs_write_seq(0x73,0x5E);
+ dcs_write_seq(0x74,0x60);
+ dcs_write_seq(0x75,0x54);
+ dcs_write_seq(0x76,0x5C);
+ dcs_write_seq(0x77,0x47);
+ dcs_write_seq(0x78,0x5F);
+ dcs_write_seq(0x79,0x5D);
+ dcs_write_seq(0x7A,0x5B);
+ dcs_write_seq(0x7B,0x76);
+ dcs_write_seq(0x7C,0x61);
+ dcs_write_seq(0x7D,0x63);
+ dcs_write_seq(0x7E,0x50);
+ dcs_write_seq(0x7F,0x45);
+ dcs_write_seq(0x80,0x34);
+ dcs_write_seq(0x81,0x1C);
+ dcs_write_seq(0x82,0x07);
+ dcs_write_seq(0xE0,0x02);
+ dcs_write_seq(0x00,0x44);
+ dcs_write_seq(0x01,0x46);
+ dcs_write_seq(0x02,0x48);
+ dcs_write_seq(0x03,0x4A);
+ dcs_write_seq(0x04,0x40);
+ dcs_write_seq(0x05,0x42);
+ dcs_write_seq(0x06,0x1F);
+ dcs_write_seq(0x07,0x1F);
+ dcs_write_seq(0x08,0x1F);
+ dcs_write_seq(0x09,0x1F);
+ dcs_write_seq(0x0A,0x1F);
+ dcs_write_seq(0x0B,0x1F);
+ dcs_write_seq(0x0C,0x1F);
+ dcs_write_seq(0x0D,0x1F);
+ dcs_write_seq(0x0E,0x1F);
+ dcs_write_seq(0x0F,0x1F);
+ dcs_write_seq(0x10,0x1F);
+ dcs_write_seq(0x11,0x1F);
+ dcs_write_seq(0x12,0x1F);
+ dcs_write_seq(0x13,0x1F);
+ dcs_write_seq(0x14,0x1E);
+ dcs_write_seq(0x15,0x1F);
+ dcs_write_seq(0x16,0x45);
+ dcs_write_seq(0x17,0x47);
+ dcs_write_seq(0x18,0x49);
+ dcs_write_seq(0x19,0x4B);
+ dcs_write_seq(0x1A,0x41);
+ dcs_write_seq(0x1B,0x43);
+ dcs_write_seq(0x1C,0x1F);
+ dcs_write_seq(0x1D,0x1F);
+ dcs_write_seq(0x1E,0x1F);
+ dcs_write_seq(0x1F,0x1F);
+ dcs_write_seq(0x20,0x1F);
+ dcs_write_seq(0x21,0x1F);
+ dcs_write_seq(0x22,0x1F);
+ dcs_write_seq(0x23,0x1F);
+ dcs_write_seq(0x24,0x1F);
+ dcs_write_seq(0x25,0x1F);
+ dcs_write_seq(0x26,0x1F);
+ dcs_write_seq(0x27,0x1F);
+ dcs_write_seq(0x28,0x1F);
+ dcs_write_seq(0x29,0x1F);
+ dcs_write_seq(0x2A,0x1E);
+ dcs_write_seq(0x2B,0x1F);
+ dcs_write_seq(0x2C,0x0B);
+ dcs_write_seq(0x2D,0x09);
+ dcs_write_seq(0x2E,0x07);
+ dcs_write_seq(0x2F,0x05);
+ dcs_write_seq(0x30,0x03);
+ dcs_write_seq(0x31,0x01);
+ dcs_write_seq(0x32,0x1F);
+ dcs_write_seq(0x33,0x1F);
+ dcs_write_seq(0x34,0x1F);
+ dcs_write_seq(0x35,0x1F);
+ dcs_write_seq(0x36,0x1F);
+ dcs_write_seq(0x37,0x1F);
+ dcs_write_seq(0x38,0x1F);
+ dcs_write_seq(0x39,0x1F);
+ dcs_write_seq(0x3A,0x1F);
+ dcs_write_seq(0x3B,0x1F);
+ dcs_write_seq(0x3C,0x1F);
+ dcs_write_seq(0x3D,0x1F);
+ dcs_write_seq(0x3E,0x1F);
+ dcs_write_seq(0x3F,0x1F);
+ dcs_write_seq(0x40,0x1F);
+ dcs_write_seq(0x41,0x1E);
+ dcs_write_seq(0x42,0x0A);
+ dcs_write_seq(0x43,0x08);
+ dcs_write_seq(0x44,0x06);
+ dcs_write_seq(0x45,0x04);
+ dcs_write_seq(0x46,0x02);
+ dcs_write_seq(0x47,0x00);
+ dcs_write_seq(0x48,0x1F);
+ dcs_write_seq(0x49,0x1F);
+ dcs_write_seq(0x4A,0x1F);
+ dcs_write_seq(0x4B,0x1F);
+ dcs_write_seq(0x4C,0x1F);
+ dcs_write_seq(0x4D,0x1F);
+ dcs_write_seq(0x4E,0x1F);
+ dcs_write_seq(0x4F,0x1F);
+ dcs_write_seq(0x50,0x1F);
+ dcs_write_seq(0x51,0x1F);
+ dcs_write_seq(0x52,0x1F);
+ dcs_write_seq(0x53,0x1F);
+ dcs_write_seq(0x54,0x1F);
+ dcs_write_seq(0x55,0x1F);
+ dcs_write_seq(0x56,0x1F);
+ dcs_write_seq(0x57,0x1E);
+ dcs_write_seq(0x58,0x40);
+ dcs_write_seq(0x59,0x00);
+ dcs_write_seq(0x5A,0x00);
+ dcs_write_seq(0x5B,0x30);
+ dcs_write_seq(0x5C,0x02);
+ dcs_write_seq(0x5D,0x40);
+ dcs_write_seq(0x5E,0x01);
+ dcs_write_seq(0x5F,0x02);
+ dcs_write_seq(0x60,0x00);
+ dcs_write_seq(0x61,0x01);
+ dcs_write_seq(0x62,0x02);
+ dcs_write_seq(0x63,0x65);
+ dcs_write_seq(0x64,0x66);
+ dcs_write_seq(0x65,0x00);
+ dcs_write_seq(0x66,0x00);
+ dcs_write_seq(0x67,0x74);
+ dcs_write_seq(0x68,0x06);
+ dcs_write_seq(0x69,0x65);
+ dcs_write_seq(0x6A,0x66);
+ dcs_write_seq(0x6B,0x10);
+ dcs_write_seq(0x6C,0x00);
+ dcs_write_seq(0x6D,0x04);
+ dcs_write_seq(0x6E,0x04);
+ dcs_write_seq(0x6F,0x88);
+ dcs_write_seq(0x70,0x00);
+ dcs_write_seq(0x71,0x00);
+ dcs_write_seq(0x72,0x06);
+ dcs_write_seq(0x73,0x7B);
+ dcs_write_seq(0x74,0x00);
+ dcs_write_seq(0x75,0x87);
+ dcs_write_seq(0x76,0x00);
+ dcs_write_seq(0x77,0x5D);
+ dcs_write_seq(0x78,0x17);
+ dcs_write_seq(0x79,0x1F);
+ dcs_write_seq(0x7A,0x00);
+ dcs_write_seq(0x7B,0x00);
+ dcs_write_seq(0x7C,0x00);
+ dcs_write_seq(0x7D,0x03);
+ dcs_write_seq(0x7E,0x7B);
+ dcs_write_seq(0xE0,0x04);
+ dcs_write_seq(0x09,0x10);
+ dcs_write_seq(0xE0,0x00);
+ dcs_write_seq(0xE6,0x02);
+ dcs_write_seq(0xE7,0x02);
+ // dcs_write_seq(0x11);// SLPOUT
+ // msleep (120);
+ // dcs_write_seq(0x29);// DSPON
+ // msleep (20);
+ // dcs_write_seq(0x35,0x00);// TE
+
+ return 0;
+}
+
+static int cwu50_unprepare(struct drm_panel *panel)
+{
+ struct cwu50 *ctx = panel_to_cwu50(panel);
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ int err;
+
+ /* Power off the display using case 1 described in JD9365D.pdf chapter 9.5.3.
+ * module's default behaviour
+ */
+ if (1 == power_off_case) {
+ goto power_off_case1;
+ }
+
+ /* Power off the display using case 2 described in JD9365D.pdf chapter 9.5.3. */
+
+ /* tCMD_OFF >= 1ms */
+ msleep(1);
+
+ err = mipi_dsi_dcs_set_display_off(dsi);
+ if (err) {
+ dev_warn(ctx->dev, "failed to send display off command (%d)\n", err);
+ goto fallback_case1;
+ }
+
+ /* tDISOFF >= 50ms */
+ msleep(50);
+
+
+ err = mipi_dsi_dcs_enter_sleep_mode(dsi);
+ if (err) {
+ dev_warn(ctx->dev, "failed to enter sleep mode (%d)\n", err);
+ goto fallback_case1;
+ }
+
+ /* tSLPIN >= 100ms */
+ msleep(100);
+
+
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1); /* assert reset */
+
+ goto disable_regulators;
+
+fallback_case1:
+ /* in case of error, fall back to case 1 */
+ dev_warn(ctx->dev, "falling back to power off case 1 using HW reset line");
+power_off_case1:
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1); /* assert reset */
+ /* tRSTOFF1 >= 120ms */
+ msleep(120);
+
+disable_regulators:
+ regulator_disable(ctx->vci);
+ regulator_disable(ctx->iovcc);
+
+ return 0;
+}
+
+static int cwu50_prepare(struct drm_panel *panel)
+{
+ struct cwu50 *ctx = panel_to_cwu50(panel);
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ int err;
+ u8 response;
+
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1); /* ensure asserted state */
+
+ /* IOVCC first, then VCI */
+ err = regulator_enable(ctx->iovcc);
+ if (err) {
+ dev_err(ctx->dev, "failed to enable iovcc (%d)\n", err);
+ return err;
+ }
+
+ /* tPWON>= 0ms */
+
+ /* MIPI should change to LP-11 after turning on vci according to JD9365D.pdf */
+ err = regulator_enable(ctx->vci);
+ if (err) {
+ dev_err(ctx->dev, "failed to enable vci (%d)\n", err);
+ goto disable_iovcc;
+ }
+
+ /* Wait for MIPI to initialize
+ * tRPWIRES >= 5ms
+ * 0 <= tMIPI_ON <= tRPWIRES
+ */
+ msleep(30);
+
+ /* MIPI should be LP-11 now */
+
+ /* tRESETL=10us */
+ /* tRESETH >= 5ms */
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0); /* deassert */
+ msleep(5);
+
+ /* Exit sleep mode and power on */
+
+ err = cwu50_init_sequence(ctx);
+ if (err) {
+ dev_err(ctx->dev, "failed to send initialize sequence (%d)\n", err);
+ goto disable_vci;
+ }
+
+ /* slpout */
+ err = mipi_dsi_dcs_exit_sleep_mode(dsi);
+ if (err) {
+ dev_err(ctx->dev, "failed to exit sleep mode (%d)\n", err);
+ goto disable_vci;
+ }
+
+ /* tSLPOUT 120ms */
+ msleep(120);
+
+ err = mipi_dsi_dcs_set_display_on(dsi);
+ if (err) {
+ dev_err(ctx->dev, "failed to turn display on (%d)\n", err);
+ goto disable_vci;
+ }
+ msleep(20);
+
+ /* Enabe tearing mode: send TE (tearing effect) at VBLANK */
+ /* JD9365D seems need a parameter for this command */
+ err = mipi_dsi_dcs_write_buffer(dsi, (u8[]){ 0x35, 0x00 }, 2);
+ // err = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+ if (err < 0) {
+ dev_err(ctx->dev, "failed to enable vblank TE (%d)\n", err);
+ goto disable_vci;
+ }
+
+ err = mipi_dsi_dcs_get_power_mode(dsi, &response);
+ if (!err) {
+ /* debug, normally the command will fail */
+ dev_info(ctx->dev, "Read display power mode got: %d", response);
+ }
+
+ return 0;
+disable_vci:
+ regulator_disable(ctx->vci);
+disable_iovcc:
+ regulator_disable(ctx->iovcc);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ return err;
+}
+
+static int cwu50_get_modes(struct drm_panel *panel, struct drm_connector *connector)
+{
+ struct cwu50 *ctx = panel_to_cwu50(panel);
+ struct drm_display_mode *mode;
+
+ mode = drm_mode_duplicate(connector->dev, &default_mode);
+ if (!mode) {
+ dev_err(panel->dev, "bad mode or failed to add mode\n");
+ return -EINVAL;
+ }
+ drm_mode_set_name(mode);
+ mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
+
+ /* set up connector's "panel orientation" property */
+ /*
+ * TODO: Remove once all drm drivers call
+ * drm_connector_set_orientation_from_panel()
+ */
+ drm_connector_set_panel_orientation(connector, ctx->orientation);
+
+ drm_mode_probed_add(connector, mode);
+
+ return 1; /* Number of modes */
+}
+
+static enum drm_panel_orientation cwu50_get_orientation(struct drm_panel *panel)
+{
+ struct cwu50 *ctx = panel_to_cwu50(panel);
+
+ return ctx->orientation;
+}
+
+static const struct drm_panel_funcs cwu50_drm_funcs = {
+ .unprepare = cwu50_unprepare,
+ .prepare = cwu50_prepare,
+ .get_modes = cwu50_get_modes,
+ .get_orientation = cwu50_get_orientation,
+};
+
+static int cwu50_probe(struct mipi_dsi_device *dsi)
+{
+ struct device *dev = &dsi->dev;
+ struct cwu50 *ctx;
+ int err;
+
+ ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
+ if (!ctx)
+ return -ENOMEM;
+
+ mipi_dsi_set_drvdata(dsi, ctx);
+ ctx->dev = dev;
+
+ dsi->lanes = 4;
+ dsi->format = MIPI_DSI_FMT_RGB888;
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO |
+ MIPI_DSI_MODE_VIDEO_BURST |
+ MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
+
+ ctx->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
+ if (IS_ERR(ctx->reset_gpio)) {
+ err = PTR_ERR(ctx->reset_gpio);
+ return dev_err_probe(dev, err, "Failed to request GPIO (%d)\n", err);
+ }
+
+ ctx->vci = devm_regulator_get(dev, "vci");
+ if (IS_ERR(ctx->vci)) {
+ err = PTR_ERR(ctx->vci);
+ return dev_err_probe(dev, err, "Failed to request vci regulator: %d\n", err);
+ }
+
+ ctx->iovcc = devm_regulator_get(dev, "iovcc");
+ if (IS_ERR(ctx->iovcc)) {
+ err = PTR_ERR(ctx->iovcc);
+ return dev_err_probe(dev, err, "Failed to request iovcc regulator: %d\n", err);
+ }
+
+ err = of_drm_get_panel_orientation(dev->of_node, &ctx->orientation);
+ if (err) {
+ dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
+ return err;
+ }
+
+ ctx->panel.prepare_prev_first = true;
+
+ drm_panel_init(&ctx->panel, dev, &cwu50_drm_funcs, DRM_MODE_CONNECTOR_DSI);
+
+ err = drm_panel_of_backlight(&ctx->panel);
+ if (err)
+ return dev_err_probe(dev, err, "Failed to get backlight\n");
+
+ drm_panel_add(&ctx->panel);
+
+ err = mipi_dsi_attach(dsi);
+ if (err < 0) {
+ dev_err(dev, "mipi_dsi_attach() failed: %d\n", err);
+ drm_panel_remove(&ctx->panel);
+ return err;
+ }
+
+ return 0;
+}
+
+static void cwu50_remove(struct mipi_dsi_device *dsi)
+{
+ struct cwu50 *ctx = mipi_dsi_get_drvdata(dsi);
+
+ mipi_dsi_detach(dsi);
+ drm_panel_remove(&ctx->panel);
+}
+
+static const struct of_device_id cwu50_of_match[] = {
+ { .compatible = "clockwork,cwu50" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, cwu50_of_match);
+
+static struct mipi_dsi_driver cwu50_driver = {
+ .probe = cwu50_probe,
+ .remove = cwu50_remove,
+ .driver = {
+ .name = "panel-clockwork-cwu50",
+ .of_match_table = cwu50_of_match,
+ },
+};
+module_mipi_dsi_driver(cwu50_driver);
+
+MODULE_DESCRIPTION("ClockworkPi CWU50 panel driver");
+MODULE_LICENSE("GPL v2");
--
2.45.0

122
uconsole/kernel/patches/006-vc4_dsi-update-20241008.patch Normal file
View File

@ -0,0 +1,122 @@
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
@@ -286,6 +286,8 @@
DSI1_INT_PR_TO)
#define DSI0_STAT 0x2c
+# define DSI0_STAT_ERR_CONT_LP1 BIT(6)
+# define DSI0_STAT_ERR_CONT_LP0 BIT(5)
#define DSI0_HSTX_TO_CNT 0x30
#define DSI0_LPRX_TO_CNT 0x34
#define DSI0_TA_TO_CNT 0x38
@@ -818,7 +820,14 @@
disp0_ctrl = DSI_PORT_READ(DISP0_CTRL);
disp0_ctrl &= ~DSI_DISP0_ENABLE;
DSI_PORT_WRITE(DISP0_CTRL, disp0_ctrl);
+}
+static void vc4_dsi_bridge_post_disable(struct drm_bridge *bridge,
+ struct drm_bridge_state *state)
+{
+ struct vc4_dsi *dsi = bridge_to_vc4_dsi(bridge);
+ struct device *dev = &dsi->pdev->dev;
+
/* Reset the DSI and all its fifos. */
DSI_PORT_WRITE(CTRL, DSI_CTRL_SOFT_RESET_CFG |
DSI_PORT_BIT(CTRL_RESET_FIFOS));
@@ -828,14 +837,6 @@
DSI_PORT_BIT(PHY_AFEC0_PD) |
DSI_PORT_BIT(AFEC0_PD_ALL_LANES));
-}
-
-static void vc4_dsi_bridge_post_disable(struct drm_bridge *bridge,
- struct drm_bridge_state *state)
-{
- struct vc4_dsi *dsi = bridge_to_vc4_dsi(bridge);
- struct device *dev = &dsi->pdev->dev;
-
clk_disable_unprepare(dsi->pll_phy_clock);
clk_disable_unprepare(dsi->escape_clock);
clk_disable_unprepare(dsi->pixel_clock);
@@ -1204,10 +1205,9 @@
&dsi->bridge, flags);
}
-static ssize_t vc4_dsi_host_transfer(struct mipi_dsi_host *host,
- const struct mipi_dsi_msg *msg)
+static ssize_t vc4_dsi_transfer(struct vc4_dsi *dsi,
+ const struct mipi_dsi_msg *msg, bool log_error)
{
- struct vc4_dsi *dsi = host_to_dsi(host);
struct mipi_dsi_packet packet;
u32 pkth = 0, pktc = 0;
int i, ret;
@@ -1316,10 +1316,12 @@
DSI_PORT_WRITE(TXPKT1C, pktc);
if (!wait_for_completion_timeout(&dsi->xfer_completion,
- msecs_to_jiffies(1000))) {
- dev_err(&dsi->pdev->dev, "transfer interrupt wait timeout");
- dev_err(&dsi->pdev->dev, "instat: 0x%08x\n",
- DSI_PORT_READ(INT_STAT));
+ msecs_to_jiffies(500))) {
+ if (log_error) {
+ dev_err(&dsi->pdev->dev, "transfer interrupt wait timeout");
+ dev_err(&dsi->pdev->dev, "instat: 0x%08x, stat: 0x%08x\n",
+ DSI_PORT_READ(INT_STAT), DSI_PORT_READ(INT_STAT));
+ }
ret = -ETIMEDOUT;
} else {
ret = dsi->xfer_result;
@@ -1362,7 +1364,8 @@
return ret;
reset_fifo_and_return:
- DRM_ERROR("DSI transfer failed, resetting: %d\n", ret);
+ if (log_error)
+ DRM_ERROR("DSI transfer failed, resetting: %d\n", ret);
DSI_PORT_WRITE(TXPKT1C, DSI_PORT_READ(TXPKT1C) & ~DSI_TXPKT1C_CMD_EN);
udelay(1);
@@ -1375,6 +1378,40 @@
return ret;
}
+static ssize_t vc4_dsi_host_transfer(struct mipi_dsi_host *host,
+ const struct mipi_dsi_msg *msg)
+{
+ struct vc4_dsi *dsi = host_to_dsi(host);
+ u32 stat, disp0_ctrl;
+ int ret;
+
+ ret = vc4_dsi_transfer(dsi, msg, false);
+
+ if (ret == -ETIMEDOUT) {
+ stat = DSI_PORT_READ(STAT);
+ disp0_ctrl = DSI_PORT_READ(DISP0_CTRL);
+
+ DSI_PORT_WRITE(STAT, DSI_PORT_BIT(STAT_ERR_CONT_LP1));
+ if (!(disp0_ctrl & DSI_DISP0_ENABLE)) {
+ /* If video mode not enabled, then try recovering by
+ * enabling it briefly to clear FIFOs and the state.
+ */
+ disp0_ctrl |= DSI_DISP0_ENABLE;
+ DSI_PORT_WRITE(DISP0_CTRL, disp0_ctrl);
+ msleep(30);
+ disp0_ctrl &= ~DSI_DISP0_ENABLE;
+ DSI_PORT_WRITE(DISP0_CTRL, disp0_ctrl);
+ msleep(30);
+
+ ret = vc4_dsi_transfer(dsi, msg, true);
+ } else {
+ DRM_ERROR("DSI transfer failed whilst in HS mode stat: 0x%08x\n",
+ stat);
+ }
+ }
+ return ret;
+}
+
static const struct component_ops vc4_dsi_ops;
static int vc4_dsi_host_attach(struct mipi_dsi_host *host,
struct mipi_dsi_device *device)

100
uconsole/kernel/patches/007-drm-panel-cwu50-expose-dsi-error-status-to-userspace.patch Normal file
View File

@ -0,0 +1,100 @@
From ce15102d754c4cc8972ec4b1aaa6301d7b66c669 Mon Sep 17 00:00:00 2001
From: Potato <nikko@faint.day>
Date: Wed, 13 Dec 2023 13:32:33 +0800
Subject: [PATCH 7/7] drm: panel: cwu50: expose dsi error status to userspace
via sysfs
---
drivers/gpu/drm/panel/panel-clockwork-cwu50.c | 42 ++++++++++++++++++-
1 file changed, 41 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-clockwork-cwu50.c b/drivers/gpu/drm/panel/panel-clockwork-cwu50.c
index aef3f587a1f1..f3f689d1e0e3 100644
--- a/drivers/gpu/drm/panel/panel-clockwork-cwu50.c
+++ b/drivers/gpu/drm/panel/panel-clockwork-cwu50.c
@@ -26,6 +26,31 @@ struct cwu50 {
struct regulator *iovcc;
struct gpio_desc *reset_gpio;
enum drm_panel_orientation orientation;
+ int dsi_status; // 0: ok, 1: error
+ bool sysfs_node_created;
+};
+
+static ssize_t dsi_state_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev);
+ struct cwu50 *ctx = mipi_dsi_get_drvdata(dsi);
+
+ if (!ctx->dsi_status)
+ return scnprintf(buf, PAGE_SIZE, "ok\n");
+ else
+ return scnprintf(buf, PAGE_SIZE, "error\n");
+}
+
+static DEVICE_ATTR(dsi_state, 0444, dsi_state_show, NULL);
+
+static struct attribute *dsi_state_attrs[] = {
+ &dev_attr_dsi_state.attr,
+ NULL
+};
+
+static const struct attribute_group dsi_attr_group = {
+ .attrs = dsi_state_attrs,
};
static const struct drm_display_mode default_mode = {
@@ -354,7 +379,7 @@ static int cwu50_prepare(struct drm_panel *panel)
err = regulator_enable(ctx->iovcc);
if (err) {
dev_err(ctx->dev, "failed to enable iovcc (%d)\n", err);
- return err;
+ goto error_finialize;
}
/* tPWON>= 0ms */
@@ -419,12 +444,16 @@ static int cwu50_prepare(struct drm_panel *panel)
dev_info(ctx->dev, "Read display power mode got: %d", response);
}
+ ctx->dsi_status = 0; // ok
+
return 0;
disable_vci:
regulator_disable(ctx->vci);
disable_iovcc:
regulator_disable(ctx->iovcc);
+error_finialize:
gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ ctx->dsi_status = 1;
return err;
}
@@ -527,6 +556,13 @@ static int cwu50_probe(struct mipi_dsi_device *dsi)
return err;
}
+ err = sysfs_create_group(&dsi->dev.kobj, &dsi_attr_group);
+ if (err < 0) {
+ dev_warn(dev, "Cannot create optional sysfs nodes: %d\n", err);
+ } else {
+ ctx->sysfs_node_created = true;
+ }
+
return 0;
}
@@ -534,6 +570,10 @@ static void cwu50_remove(struct mipi_dsi_device *dsi)
{
struct cwu50 *ctx = mipi_dsi_get_drvdata(dsi);
+ if (ctx->sysfs_node_created) {
+ sysfs_remove_group(&dsi->dev.kobj, &dsi_attr_group);
+ }
+
mipi_dsi_detach(dsi);
drm_panel_remove(&ctx->panel);
}
--
2.45.0

203
uconsole/kernel/patches/008-driver-staging-add-uconsole-simple-amplifier-switch.patch Normal file
View File

@ -0,0 +1,203 @@
From d2175c2cef3c9fd0a5fa52f8641901eab1d43285 Mon Sep 17 00:00:00 2001
From: Potato <nikko@faint.day>
Date: Fri, 13 Oct 2023 11:08:40 +0800
Subject: [PATCH 3/7] driver: staging: add uconsole simple amplifier switch
---
drivers/staging/Kconfig | 2 +
drivers/staging/Makefile | 1 +
drivers/staging/uconsole/Kconfig | 10 ++
drivers/staging/uconsole/Makefile | 1 +
.../uconsole/simple-amplifier-switch.c | 131 ++++++++++++++++++
5 files changed, 145 insertions(+)
create mode 100644 drivers/staging/uconsole/Kconfig
create mode 100644 drivers/staging/uconsole/Makefile
create mode 100644 drivers/staging/uconsole/simple-amplifier-switch.c
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig
index f9aef39cac2e..89b845d8132c 100644
--- a/drivers/staging/Kconfig
+++ b/drivers/staging/Kconfig
@@ -78,4 +78,6 @@ source "drivers/staging/qlge/Kconfig"
source "drivers/staging/vme_user/Kconfig"
+source "drivers/staging/uconsole/Kconfig"
+
endif # STAGING
diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile
index ffa70dda481d..596bbc7760f1 100644
--- a/drivers/staging/Makefile
+++ b/drivers/staging/Makefile
@@ -2,6 +2,7 @@
# Makefile for staging directory
obj-y += media/
+obj-y += uconsole/
obj-$(CONFIG_PRISM2_USB) += wlan-ng/
obj-$(CONFIG_FB_OLPC_DCON) += olpc_dcon/
obj-$(CONFIG_RTL8192U) += rtl8192u/
diff --git a/drivers/staging/uconsole/Kconfig b/drivers/staging/uconsole/Kconfig
new file mode 100644
index 000000000000..303e2e26a0b1
--- /dev/null
+++ b/drivers/staging/uconsole/Kconfig
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0
+config SIMPLE_AMPLIFIER_SWITCH
+ tristate "Simple amplifier switch driver"
+ depends on OF
+ depends on GPIOLIB
+ default n
+ help
+ Driver for simple gpio based switches. This can control a series of
+ gpios with another one. Used to control amplifiers with headphone
+ detect pin on uConsole.
diff --git a/drivers/staging/uconsole/Makefile b/drivers/staging/uconsole/Makefile
new file mode 100644
index 000000000000..8f3239c1f36c
--- /dev/null
+++ b/drivers/staging/uconsole/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_SIMPLE_AMPLIFIER_SWITCH) += simple-amplifier-switch.o
diff --git a/drivers/staging/uconsole/simple-amplifier-switch.c b/drivers/staging/uconsole/simple-amplifier-switch.c
new file mode 100644
index 000000000000..2471e035c213
--- /dev/null
+++ b/drivers/staging/uconsole/simple-amplifier-switch.c
@@ -0,0 +1,131 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// simple gpio switch support
+// use one gpio to control gpios
+// this really should be a generic gpio switch driver, leave it here anyway.
+//
+// Copyright (C) 2023 PotatoMania <nikko@faint.day>
+//
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/gpio/consumer.h>
+// #include <linux/pinctrl/consumer.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+
+/* TODO: support regulators? */
+struct simple_amplifier_switch {
+ struct gpio_desc *sw;
+ struct gpio_descs *outputs;
+};
+
+// Components:
+// sw-gpios: 1 switch input
+// outputs-gpios: array of gpios
+
+static inline void set_outputs(struct gpio_descs *outputs, int value)
+{
+ unsigned long *values;
+ int nvalues = outputs->ndescs;
+
+ values = bitmap_alloc(nvalues, GFP_KERNEL);
+ if (!values)
+ return;
+
+ if (value)
+ bitmap_fill(values, nvalues);
+ else
+ bitmap_zero(values, nvalues);
+
+ gpiod_set_array_value_cansleep(nvalues, outputs->desc,
+ outputs->info, values);
+
+ bitmap_free(values);
+}
+
+static irqreturn_t amplifier_switch_interrupt(int irq, void *data)
+{
+ struct simple_amplifier_switch *ampsw = data;
+ int state;
+
+ state = gpiod_get_value(ampsw->sw);
+ set_outputs(ampsw->outputs, state);
+
+ return IRQ_HANDLED;
+}
+
+static int amplifier_switch_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct simple_amplifier_switch *ampsw;
+ int current_state;
+ int err;
+
+ ampsw = devm_kzalloc(dev, sizeof(*ampsw), GFP_KERNEL);
+ if (!ampsw)
+ return -ENOMEM;
+
+ ampsw->sw = devm_gpiod_get(dev, "sw", GPIOD_IN);
+ if (IS_ERR(ampsw->sw)) {
+ err = PTR_ERR(ampsw->sw);
+ dev_err(dev, "Failed to get sw gpio! The input is required! (%d)\n", err);
+ return err;
+ }
+
+ ampsw->outputs = devm_gpiod_get_array(dev, "outputs", GPIOD_OUT_LOW);
+ if (IS_ERR(ampsw->outputs)) {
+ err = PTR_ERR(ampsw->outputs);
+ dev_err(dev, "Failed to get outputs gpios! (%d)\n", err);
+ return err;
+ }
+
+ // setup initial state
+ current_state = gpiod_get_value(ampsw->sw);
+ set_outputs(ampsw->outputs, current_state);
+
+ // register interrupts
+ err = devm_request_irq(dev, gpiod_to_irq(ampsw->sw), amplifier_switch_interrupt,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "amplifier-switch", ampsw);
+ if (err) {
+ dev_err(dev, "Failed to request interrupt (%d)\n", err);
+ return err;
+ }
+
+ platform_set_drvdata(pdev, ampsw);
+
+ return 0;
+}
+
+static void amplifier_switch_shutdown(struct platform_device *pdev)
+{
+ struct simple_amplifier_switch *ampsw = platform_get_drvdata(pdev);
+
+ // Unregister interrupt
+ devm_free_irq(&pdev->dev, gpiod_to_irq(ampsw->sw), ampsw);
+
+ // Turn off all outputs
+ set_outputs(ampsw->outputs, 0);
+}
+
+static const struct of_device_id of_amplifier_switchs_match[] = {
+ { .compatible = "simple-amplifier-switch" },
+ {/* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, of_amplifier_switchs_match);
+
+static struct platform_driver amplifier_switch_driver = {
+ .probe = amplifier_switch_probe,
+ .shutdown = amplifier_switch_shutdown,
+ .driver = {
+ .name = "simple-amplifier-switch",
+ .of_match_table = of_amplifier_switchs_match,
+ },
+};
+
+module_platform_driver(amplifier_switch_driver);
+
+MODULE_AUTHOR("PotatoMania <nikko@faint.day>");
+MODULE_DESCRIPTION("A simple GPIO controlled gpios switch");
+MODULE_LICENSE("GPL v2");
\ No newline at end of file
--
2.45.0