35 lines
1.2 KiB
Diff
35 lines
1.2 KiB
Diff
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
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+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
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@@ -753,7 +753,7 @@ static void vc4_dsi_ulps(struct vc4_dsi *dsi, bool ulps)
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(dsi->lanes > 1 ? DSI1_STAT_PHY_D1_STOP : 0) |
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(dsi->lanes > 2 ? DSI1_STAT_PHY_D2_STOP : 0) |
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(dsi->lanes > 3 ? DSI1_STAT_PHY_D3_STOP : 0));
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- int ret;
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+ int ret, i = 0;
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bool ulps_currently_enabled = (DSI_PORT_READ(PHY_AFEC0) &
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DSI_PORT_BIT(PHY_AFEC0_LATCH_ULPS));
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@@ -781,14 +781,15 @@ static void vc4_dsi_ulps(struct vc4_dsi *dsi, bool ulps)
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DSI_PORT_WRITE(STAT, stat_stop);
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DSI_PORT_WRITE(PHYC, DSI_PORT_READ(PHYC) & ~phyc_ulps);
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- ret = wait_for((DSI_PORT_READ(STAT) & stat_stop) == stat_stop, 200);
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- if (ret) {
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- dev_warn(&dsi->pdev->dev,
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- "Timeout waiting for DSI STOP entry: STAT 0x%08x",
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- DSI_PORT_READ(STAT));
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- DSI_PORT_WRITE(PHYC, DSI_PORT_READ(PHYC) & ~phyc_ulps);
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- return;
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+ while(wait_for((DSI_PORT_READ(STAT) & stat_stop) == stat_stop, 200)){
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+ if(i++ == 10) {
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+ DSI_PORT_WRITE(PHYC, DSI_PORT_READ(PHYC) & ~phyc_ulps);
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+ break;
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+ }
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}
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+ if(i > 0)
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+ dev_warn(&dsi->pdev->dev, "Timeout waiting for DSI STOP entry: STAT 0x%08x %d", DSI_PORT_READ(STAT), i);
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+ return;
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}
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static u32
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