diff --git a/srcpkgs/yosys/template b/srcpkgs/yosys/template
new file mode 100644
index 00000000000..1816213ccc3
--- /dev/null
+++ b/srcpkgs/yosys/template
@@ -0,0 +1,21 @@
+# Template file for 'yosys'
+pkgname=yosys
+version=0.8
+revision=1
+wrksrc=${pkgname}-${pkgname}-${version}
+build_style=gnu-makefile
+make_use_env=yes
+hostmakedepends="python3 bison flex pkg-config clang git tcl"
+makedepends="tcl-devel readline-devel libffi-devel"
+depends="graphviz xdot"
+short_desc="Verilog RTL Synthesis Suite"
+maintainer="Jasper Chan <jasperchan515@gmail.com>"
+license="GPL-3.0-or-later"
+homepage="http://www.clifford.at/yosys/about.html"
+distfiles="https://github.com/cliffordwolf/yosys/archive/yosys-${version}.tar.gz"
+checksum=07760fe732003585b26d97f9e02bcddf242ff7fc33dbd415446ac7c70e85c66f
+nocross="gcc refuses to cross compile, current version of clang doesn't ignore -fstack-clash-protection"
+
+pre_build() {
+	make config-gcc
+}